Ambarella A5

Ambarella A5 is an impressive chip.  Block diagram of future IP cameras shows what will be possible in near future.  Press release from March 16, 2010 says:

The A5s Media Processor system-on-a-chip (SoC) integrates an ARM1136J-S CPU, a DSP subsystem for ISP and H.264/MJPEG codecs, and peripherals (16-bit LPDDR2/DDR2/DDR3, NAND, SLVDS/parallel sensor i/f, BT.656 in/out, analog SD/HD out, HDMI, Ethernet MAC, USB 2.0, SSI/SPI, I2S audio, IDC, UART, RTC, WDT, GPIO, iris/AF motor stepper, and SDIO for SD Card and WiFi/3G). Based on low-power 45 nm CMOS technology, A5s consumes less than 1 Watt (including DDR) at full HD 1080p30, allowing an IP camera design to use as little as 2 Watts. Also HD 1080p60 is probably available.

I wonder if one could have low time delay videostream from the IP camera with concurrent recorded videostream from the same IP camera to the ringbuffer?

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